1. Field of the Invention
The present invention generally relates to a current-restriction circuit for a whole category of electronic equipment aboard a computerized personal organizer, a handset, a voice recognition device, a voice memory device, or a computer, etc.
2. Discussion of the Background
A configuration of known current-restriction circuits is described below with reference to FIG. 12.
Referring to FIG. 12, a known current-restriction circuit 100Z includes a driver transistor M1Z, a sense transistor M2Z, an operational amplifier circuit 1Z, a current source I1Z, a sense resistor Rsns, a bias resistor Rbi, an input terminal IN, a ground terminal GND, and an output terminal OUT. An input voltage Vi is input to the input terminal IN, and a load 20Z is connected between the output terminal OUT and the ground terminal GND.
The driver transistor M1Z includes a drain connected to the input terminal IN, a source connected to the output terminal OUT, and a gate connected to an output terminal of the operational amplifier circuit 1Z. A drain of the sense transistor M2Z is connected to a non-inverting input terminal of the operational amplifier circuit 1Z as well as the input terminal IN via the sense resistor Rsns. A source and a gate of the sense transistor M2Z are respectively connected to the source and the gate of the driver transistor M1Z.
The size of the sense transistor M2Z is set to a value obtained by dividing the size of the driver transistor M1Z by several tens or several thousands. An inverting input terminal of the operational amplifier circuit 1Z is connected to a junction node between the bias resistor Rbi and the current source I1Z.
The bias resistor Rbi is connected between the input terminal IN and the inverting input terminal of the operational amplifier circuit 1Z. The current source I1Z is connected to the inverting input terminal of the operational amplifier circuit 1Z and the ground terminal GND. It is to be noted that, in this specification, “current” means “electrical current” unless otherwise specified.
Operations of the known current restriction circuit 100Z are described below with reference to FIG. 12.
The current restriction circuit 100Z adjusts an output current Io supplied to the load 20Z via the driver transistor M1Z within a certain range. When the output current Io is supplied to the load 20Z via the driver transistor M1Z, a sense current Isns proportional to a drain current Id of the driver transistor M1Z flows to the sense transistor M2Z. When the size ratio of the driver transistor M1Z to the sense transistor M2Z is K:1, the sense current Isns is obtained by dividing the drain current Id by K.
As the sense current Isns of the sense transistor M2Z flows to the sense resistor Rsns, a sense voltage Vsns is generated in the sense resistor Rsns. The sense voltage Vsns increases as the output current Io increases. Accordingly, the electrical potential at the non-inverting input terminal of the operational amplifier circuit 1Z decreases as the output current Io increases. When the electrical potential at the non-inverting input terminal of the operational amplifier circuit 1Z is lower than the electrical potential at the inverting input terminal thereof, the output from the operational amplifier circuit 1Z decreases. Accordingly, the electrical potential at the gate of the driver transistor M1Z decreases, and then the impedance of the driver transistor M1Z increases. As a result, the output current Io is restricted to a current value at which the voltage at the non-inverting input terminal equals the voltage at the inverting input terminal.
Meanwhile, the voltage between the input voltage Vi and the inverting input terminal of the operational amplifier circuit 1Z, which is hereinafter referred to as a bias voltage Vbias, is determined by a decrease in the voltage in the bias resistor Rbi. The bias voltage Vbias is a constant voltage determined by multiplying the value of the bias resistor Rbi with that of the current source I1Z. In other words, a restricted value or maximum value (hereinafter “limited current” Ilim) of the output current Io is a current value when the sense voltage Vsns equals the bias voltage Vbias. The limited current Ilim can be expressed by formula 1 shown below.Ilim=Vbias(Rd+Rs)/(Rd·Rsns)  (1)
wherein Rd represents the impedance of the driver transistor M1Z, Rs represents the impedance of the sense transistor M2Z, and Rsns represents the resistance of the sense resistor.
The above-described known configuration has a drawback in that it is possible that the output current Io increases above the limited current Ilim when the difference between the input voltage Vi and the output voltage Vo (hereinafter “voltage difference Vi−Vo”) is relatively small. This undesirable phenomenon is described in further detail below.
FIG. 13 illustrates the relation between voltage and current in the known current-restriction circuit 100Z shown in FIG. 12. In FIG. 13, a graph (A) shows changes in the sense voltage Vsns and the bias voltage Vbias, in which a vertical axis indicates voltage and a horizontal axis indicates the voltage difference Vi−Vo. The input voltage Vi serves as a reference voltage and the voltage decreases the further it goes down in the graph (A). A graph (B) shows changes in the output current To, and a horizontal axis and a vertical axis therein indicate the voltage difference Vi−Vo and output current Io, respectively.
In the graph (A) shown in FIG. 13, the bias voltage Vbias is the voltage at the junction node between the bias resistor Rbi and the current source I1Z, the sense voltage Vsns is the voltage at a junction node between the sense resistor Rsns and the sense transistor M2Z, and reference character Vbias0 represents a predetermined or given bias voltage. The predetermined bias voltage Vbias0 is a value of the bias voltage Vbias when all the current from the current source I1Z flows to the bias resistor Rbi.
Herein, the sense current Isns can be expressed by formula 2 shown below when the voltage difference Vi−Vo is relatively small and the sense voltage Vsns is lower than the bias voltage Vbias even when the sense transistor M2Z is turned on.Isns=(Vi−Vo)/(Rsns+Rs0)  (2)
wherein Rd0 represents an on resistance of the driver transistor M1Z, Rs0 represents an on resistance of the sense transistor M2Z, and Rpara represents a wiring resistance of wiring from the input terminal IN through the driver transistor M1Z to the output terminal OUT, indicated by dotted lines shown in FIG. 12.
The sense voltage Vsns in this state can be expressed by formula 3 shown below.Vsns=Rsns·Isns=Rsns(Vi−Vo)/(Rsns+Rs0)  (3)
From the formula 3, it is known that the sense voltage Vsns is 0 V when the voltage difference Vi−Vo is 0 V and increases in proportion to the voltage difference Vi−Vo.
In addition, as a constant current is supplied to the bias resistor Rbi from the current source I1Z regardless of the voltage difference Vi−Vo, the bias voltage Vbias is constantly at the predetermined bias current Vbias0.
The output from the operational amplifier circuit 1Z is high until the sense voltage Vsns becomes equal to the predetermined bias voltage Vbias0, and accordingly the driver transistor M1Z is on during this time period. The drain current Id of the driver transistor M1Z in this state can be expressed by formula 4 shown below.Id=(Vi−Vo)/(Rd0+Rpara)  (4)
Because the output current Io is the sum of the sense current Isns and the drain current Id, the output current Io can be obtained by the following formula 5 using the formulas 2 and 4 described above.Io=(Vi−Vo)/(Rsns+Rs0)+(Vi−Vo)/(Rd0+Rpara)  (5)
In the formula 3 described above, the voltage difference Vi−Vo at which the output current Io is maximum is obtained when the sense voltage Vsns equals the predetermined bias voltage Vbias0. Therefore, the following formula 6 can be obtained when the sense voltage Vsns is replaced with the predetermined bias voltage Vbias0 in the formula 3, and then the formula 3 is solved for the voltage difference Vi−Vo.Vi−Vo=Vbias0(Rsns+Rs0)/Rsns  (6)
That is, the right-hand side of the formula 6 is the difference voltage Vi−Vo at which the output current Io is maximum. Then, the maximum value of the output current Io (hereinafter “maximum output current Imax”) can be found by substituting the formula 6 into the formula 5.Imax=Vbias0(Rd0+Rpara+Rsns+Rs0)/Rsns(Rd0+Rpara)  (7)
When the voltage difference Vi−Vo is relatively large, the gates of the driver transistor M1Z and the sense transistor M2Z are controlled by the operational amplifier circuit 1Z, and then the sense voltage Vsns constantly equals the predetermined bias voltage Vbias0. Thus, the sense current Isns can be expressed by formula 8 shown below.Isns=Vbias0/Rsns  (8)
The drain current Id of the driver transistor M1Z can be expressed by formula 9 shown below.Id=K·Isns=K·Vbias0/Rsns  (9)
wherein K represents the size ratio of the driver transistor M1Z to the sense transistor M2Z.
Because the output current Io is the sum of the sense current Isns, expressed by the formula 8, and the drain current Id of the driver transistor M1Z, expressed by the formula 9, the output current Io can be expressed by formula 10 shown below.Io=Vbias0(1+K)/Rsns  (10)
Herein, the graph (B) shown in FIG. 13 illustrates the formulas 5 and 10 when the on resistance Rd0 of the driver transistor M1Z is 0.1Ω, the on resistance Rs0 of the sense transistor M2Z is 1Ω, the wiring resistance Rpara is 0.1Ω, the sense resistor Rsns has a resistance of 5Ω, and the bias voltage Vbias is 0.1 V. In the graph (B) shown in FIG. 13, reference character VI represents a value of the voltage difference Vi−Vo at which the output current Io is at the maximum output current Imax.
After the voltage difference Vi−Vo exceeds the voltage V1, the output current Io does not immediately equal the limited current Ilim due to effects such as channel length modulation caused by the drain voltages of the sense transistor M2Z and the driver transistor M1Z differing slightly.
When the above-described parameters are substituted into the formula 1, the limited current Ilim is 0.22 A. Similarly, the maximum output current Imax is 0.62 A according to the formula 7, and the voltage V1 is 0.12 V according to the formula 3. Thus, it is possible that the maximum output current Imax can nearly triple the limited current Ilim.
When the maximum output current Imax is larger than the limited current Ilim, the following inconvenience is caused.
To design devices using the current-restriction circuit, designers must consider the possibility that, depending on a sequence of fluctuations in the load, the output current Io may increase to the maximum output current Imax even though the specified rated current is the limited current Ilim. That is, an allowable load current of the power source provided on the upstream side in the system should be increased, and the width of substrate wiring on the upstream side as well as the downstream side should be increased.
Therefore, there is a need to provide a current-restriction circuit that reduces the difference between the maximum output current Imax and the limited current Ilim, which the known current-restriction circuits fail to do.